Recently, the technical blogs and forums were all abuzz about a fuzzy die photo of Intel’s upcoming Larrabee processor. Shown at a presentation of the opening of the Visual Computing Institute of Germany’s Saarland University, the die may ask more questions than it answers. How many cores? What cache size? What clock speed? What unique and new features extend its performance? According to an analysis from PC Perspective, it looks to have 32 cores and 32 vector processing units — though admittedly hard to know for sure given the blurry photo. There is also a more detailed theoretical analysis by Scott Wassan at The Tech Report.
An email response from Intel to PC Perspective indicates Larrabee’s status so far. It reads, “Muhib did show what the silicon looks like. Nabi is healthy and in our labs right now. There will be multiple versions of Larrabee over time. We are not releasing additional details at this time.”
Nabi represents an idea–one that both AMD and Intel are moving toward with future hardware designs. It’s the a goal of merging the CPU and the GPU into a single, functional unit which is more programmable than today’s high-end GPUs, but also provides the general, real-world programming needs of today’s x86 applications, operating systems and (perhaps most importantly) virtualized environments.
Each discrete core has been identified by Intel as “Multi-threaded Wide SIMD”, which suggests Larrabee will have high compute abilities designed specifically around multiple threads executing SIMD (Single Instruction, Multiple Data–like MMX/SSE/2/3/4), the purpose of which is to carry out massively parallel mathematical operations with very little computational throughput on the computer instruction side.
Not only will Larrabee have multiple threads per core, but each core is specifically designed to execute on multiple simultaneous pieces of data per instruction. “Multi” means at least two, and SIMD means at least two — and in the context of existing SSE* designs, typically four or eight operations, so every CPU cycle the Larrabee cores should be capable of processing four to 16, and even as many as 32 or 64 pieces of data per clock cycle. With that kind of theoretical throughput, even low clocked cores would provide superior performance to today’s high-end GPUs.
Rick’s Opinion
The image above shows the diagram Intel had previously released regarding how Larrabee would work. you can see the tight coupling to memory via multiple ports, also a type of almost shared network fabric between cores, as if to suggest they communicate not only with main memory, but with each other. This may well allow for multiple mini-cores to “share resources” between other cores, allowing for a more enhanced threading model than today’s HyperThreading (such as with quad-threads, or oct-threads, as is seen in Sun’s Niagara CPUs).
Also, when you look at the known-to-exist die shots of AMD’s RV770 and Nvidia’s G80, there area lot of similarities. The tight memory integration is evident, as is the caching architecture.
Intel already designs discrete graphics units for its chipsets, though these are often targeted at usable performance and low power use for notebook applications. Larrabee is expected to perform at the other end of that spectrum, providing equal or greater performance than today’s high-end GPUs, while simultaneously providing massively parallel CPU abilities for the consumer PC.
With such a design, a lot of really amazing power savings abilities also come into play. The theoretical ability to shut down many of its cores, and only operate on maybe 1/10th normal idle power, means idle power use of well under 2 watts could be possible. Intel has not given any performance or power numbers to date, so this is pure speculation.
Still, the x86-based design will allow for powerful new games and 3D and heavy-compute applications to be created in a way not possible today from a single-socket architecture. And these types of multi-function CPU/GPUs are the way of the future.
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